1. General description

The 74HC164; 74HCT164 is an 8-bit serial-in/parallel-out shift register. The device features two

serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially

through DSA or DSB and either input can be used as an active HIGH enable for data entry through

the other input. Data is shifted on the LOW-to-HIGH transitions of the clock (CP) input. A LOW on

the master reset input (MR) clears the register and forces all outputs LOW, independently of other

inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface

inputs to voltages in excess of VCC.

2. Features and benefits

• Wide supply voltage range from 2.0 to 6.0 V

• CMOS low power dissipation

• High noise immunity

• Input levels:

• For 74HC164: CMOS level

• For 74HCT164: TTL level

• Gated serial data inputs

• Asynchronous master reset

• Complies with JEDEC standards

• JESD8C (2.7 V to 3.6 V)

• JESD7A (2.0 V to 6.0 V)

• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V

• Multiple package options

• Specified from -40 °C to +85 °C and -40 °C to +125 °C

3. Ordering information

4. Functional diagram